Researchers from the University of Texas at Dallas (UT Dallas) Erik Jonsson School of Engineering and Computer Science, as well as from Texas A&M University, recently won nearly $500,000 in funding to find better
ways to secure split-manufacturing of computer chips.
“In the split-manufacturing framework, a
design house creates the Front End of Line (FEOL) layers at an untrusted,
high-end foundry,” UT Dallas Assistant Professor of Electrical Engineering
Dr. Jeyavijayan Rajendran said. “The Back End of Line (BEOL) layers are then fabricated at the
design house’s trusted, low-end foundry. This allows companies to
simultaneously alleviate the cost of owning a trusted foundry and eliminate the
security risks associated with outsourcing the fabrication of integrated
circuits.”
With their $480,000 grant from the National
Science Foundation and the Semiconductor Research Corporation, researchers
will work to determine how attackers would compromise chips or recreate missing
design elements to create unauthorized chips. Armed with knowledge of what
potential attackers might attempt, they will then work to counter those
methods.
“To overcome this security vulnerability in
split manufacturing, we developed an automated tool that ensures security by
design,” Rajendran said. “This defense improves the security of split
manufacturing by deceiving the FEOL attacker into making wrong connections.”
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